I2C Communication

1. About I²C communication

Serial communication USART, which was basically used, is only used 1:1. Therefore, in order to connect with multiple devices, multiple transceivers corresponding thereto are required, so there is a limitation in hardware. To improve this, communication was developed by Philips in the 1980s to tie transmit and receive and branch off this and another clock line to connect another device. It is called I²C ([eye-squared-C] or IIC, Inter -Integrated Circuit). Let's learn about this I²C communication.

 

2. I²C communication wiring diagram

 

As shown in the figure, the I²C wiring diagram connects SCL (Serial Clock) and SDA (Serial Data) and adds a pull-up resistor to both lines. And the device that manages the clock and transmits it together with the clock is Controller, and the device that receives the clock and responds to the data is the Target. In addition, it is a synchronous half-duplex communication that transmits and receives on one line.
  Since both SCL and SDA outputs are open-collector or open-drain, an external pull-up resistor is absolutely necessary. However, rather than calculating this resistance value, the general values of 2.2 kΩ, 3.3 kΩ, and 4.7 kΩ are appropriately determined. decide There are several modes for speed, so use it according to the mode supported by the target device.

 

 

Add Target to change communication from 1：1 to 1：N as shown in the figure. Even when there are two Targets, the two lines are branched and connected in the same way, but there is no additional resistor added. By increasing the number of Targets to 3 or more, up to 127 (7-bit address method) or 1023 (10-bit address method) is possible. However, if there are many branched lines, it may be necessary to adjust the value of the resistor due to the capacitance problem on the line.
  For reference, I²C communication is an N：N method, and there are cases where there are two or more control devices, but it is a method of controlling by determining the status of clock and data to take priority of control. When dividing into Controller 1 and Controller 2, Controller 2 waits while Controller 1 transmits data and takes control when the end of data transmission is confirmed.

 

3. Operation mode of I²C communication

According to the supported speed, it is divided into 5 names and used. If the Target supports a certain mode, it means that it operates at a speed lower than that, but since the data frame of I2C communication is quite long, it is mostly possible to use the maximum speed possible.

 

Operation Mode	Max. Speed	Max. Capacitance	Max. Rise/Fall Time
Low-speed mode(Ls)	10 kbps	-	-
Standard mode(Sm)	100 kbps	400 pF	1000 ns / 300 ns
Fast mode(Fm)	400 kbps	400 pF	300 ns / 300 ns
Fast mode+(Fm+)	1 Mbps	550 pF	120 ns / 120 ns
High-speed mode(Hs)	1.7 Mbps	400 pF	80 ns / 80 ns
High-speed mode(Hs)	3.4 Mbps	100 pF	40 ns / 40 ns

 

First of all, the Low-speed mode is known as a standard for compatibility with other communications, and is not an officially used operation mode in I2C communications. And, the High-speed mode is divided into two by the capacitance on the line, and you can think of it as operating up to 1.7 Mbps at a maximum of 400 pF and 3.4 Mbps at a maximum of 100 pF. In addition to these, there is a communication called Ultra-fast mode(UFm) of 5 Mbps, but since it is a push-pull type one-way communication(write only), it is treated separately here.

 

4. I²C communication data frame

 

As shown in the figure, in the inactive state before the data frame, both lines maintain a high level according to the pull-up resistor. Then, at the beginning, the control device changes the SDA line to a low level and informs the target device of the start of the frame. This is called the Start Condition. Conversely, when SCL is high at the end, SDA changes to high level is called a stop condition. These start and stop conditions indicate the start and end of a data frame, and in the case of multiple Controller, it becomes the standard for exchanging authority to control.
Next, when looking at the structure, after the start condition, the control device transmits 8-bits by adding read (‘1’) or write (‘0’) together with the 7-bit address of the target device. Immediately after, the Target corresponding to the address changes to a low level and informs the Controller that it is ready. This is called ACK(Acknowledgment). If the Target cannot respond, it is maintained at a high level by pull-up, which is called NACK(Not-acknowledgement). When the ACK is confirmed, the Controller transmits data, and when NACK is confirmed, the Controller determines that there is no Target to respond and ends the communication.
  If you look at only the address, it is divided into the upper 4 digits(A6 to A3) and the lower 3 digits(A2 to A0)＋R/W’. Most of them are designated by the manufacturer except for the special commands in the case of 0000 and 1111 in the upper 4 digits. And the lower 3 digits are provided so that it can be slightly changed due to hardware design. Accordingly, a plurality of Target of the same type may be connected within the same line. The R/W' bit becomes R/W’＝1 when the Controller wants to receive(read) the subsequent command, and R/W’＝0 when it wants to transmit(write).

 

 

The figure is a data frame where R/W’＝1 and writing is executed. When the response is ACK by sending the Target address, the Controller transmits the internal address to execute write again. At this time, every 8-bit transmission must receive an ACK, and then send the data to be written. The ACK is checked until the last data, and the frame is terminated at the judgment of the Controller. This sequence is illustrated in the figure below.

 

 

In the case of read, if R/W’＝1 is transmitted, the data is received immediately after confirmation of the ACK, so the internal address to be read cannot be determined. Therefore, in advance, R/W’ ＝0 is written and the internal address is designated but data is not transmitted. After that, R/W’ ＝1 is transmitted, the data of the Target is read, and again, the Controller replies with an ACK every 8-bit. The data frame ends with the response after the Controller read to the end as NACK.

These processes are different for each target device, so check and change accordingly.

 

 

The 10-bit address is divided into two bytes and transmitted from the Controller as shown in the figure. For the first A14~A10, it informs the device on the line that it is a 10-bit address method with ‘11110’, and transmits the remaining addresses A9~A8 and R/W’ to receive a response from the corresponding Target. Then, the Target is specified by transmitting A7 to A0. After that, the part that designates the internal address of the Target is the same.

 

5. SMBus communication, PMBus communication

A derivative of I²C defined by Intel and Duracell in the 1990s for communication with power-related devices such as the rechargeable battery system of a motherboard in a laptop is called SMBus(System Management Bus). SMBus continued to be used as communication for controlling smart battery system (SBS), and in the 2000s, several companies improved it based on SMBus again for power system management, which is called PMBus(Power Management Bus).

 

	I2C	SMBus	PMBus
Speed range	0 ~ 3.4 Mbps(Bi-dir)	10 ~ 100 kbps(v2.0)	10 ~ 400 kbps
	0 ~ 5 Mbps(Uni-dir)	10 ~ 1 Mbps(v3.0)
Clock Timeout	No	Yes	Yes
Address length	7 bit(127)/10 bit(1023)	7 bit(128)	7 bit(128)
Limit on frame	No	32 Byte	255 Byte
Sink current	3 mA Max.	350 uA Max.(v1.1)	350 uA Max.(v1.0)
		4 mA Max.(v2.0)
Low level reference voltage	0.3×VDD V	0.8 V	0.8 V
High level reference voltage	0.7×VDD V	2.1 V	2.1 V
Error check	No	PEC(v1.1, CRC-8)	PEC(v1.0, CRC-8)

 

Both SMBus and PMBus are variants of I²C, and although the wiring method is half-duplex communication with two lines, clock and data, there are some differences in detail, which may not be compatible depending on the wiring environment. Due to the time limit, the minimum operating speed is determined and the range of the driving current is different, so it may be necessary to modify the pull-up resistor. In addition, refer to the fact that PEC(Packet Error Checking) is included in the communication frame itself.

 

6. Conclusion

I²C should be reviewed when slow but multi-connected serial communication is required, such as PROM-type memory, input/output expander, and thermo/hygrometer.

SPI Communication

1. About SPI communication

Serial communication USART, which was basically used, is only used 1：1. Therefore, in order to connect with multiple devices, multiple transceivers corresponding thereto are required, so there is a limitation in hardware. To improve this, communication that connects another device by branching off each line of transmit, receive, and clock was developed by Motorola in the 1980s, which is called SPI (Serial Peripheral Interface). Learn about this SPI communication.

 

2. SPI communication wiring diagram

 

As shown in the figure, the wiring diagram of SPI communication connects between MOSI (Master Out, Slave In), MISO (Master In, Slave Out), SCLK (Serial Clock), and SS# (Slave Select). It is a synchronous full-duplex communication in which the direction of transmission or reception for MOSI and MISO is determined depending on whether the device is a master device or a slave device.
  SS' is a low level active method, and should be maintained at a high level during normal times. SCLK is managed only by the master, and data is transmitted to MOSI along with the clock. Slave transmits to MISO according to the received clock. The communication speed is not set, but it operates only if it is set within the upper limit of the operation of the slave device. Usually, the range is wide from 1 Mbps to over 50 Mbps.

 

 

Add a slave to change communication from 1：1 to 1：N as shown in the figure. When there are two slave devices, a line connecting the master to SS₂# is added, and a low level signal is given to SS₁# when communicating with first slave and to SS₂# when communicating with second slave to determine the communication target. When the third generation is added, SS₃# added from the master is connected with the SS# of the slave. If you continue to add in the same way, there is no limit on the number of communication itself, but there is a limit on the number of individual lines for the master to control SS#. Therefore, instead of reducing the number of SS# lines, there is also a daisy-chain wiring method in which the master's command and the slave's response must be made in order, but it is omitted here.

 

3. Operation mode of SPI communication

 

Unlike other communications, SPI communication has to set the time to recognize data based on the clock. As shown in the figure, the center of each data is the standard for the sampling position to read two values. At this time, it depends on whether the edge of the clock is the first or the second, and whether the phase of the clock is normal or inverted. For CLK0 and CLK1, both are in normal phase, but CLK0 is read from the first edge and CLK1 is read from the second edge. CLK2 and CLK3 are in inverted phase, CLK2 is read from the first edge and CLK3 is read from the second edge. In this way, communication is possible only when the master and slave select one of the four options as the SPI mode. The four modes are summarized as follows.

 

SPI Mode	Phase Inversion(CPOL)	Phase Delay(CPHA)
0	Normal(0)	Immediate(0)
1	Normal(0)	Delay(1)
2	Invert(1)	Immediate(0)
3	Invert(1)	Delay(1)

 

Comparing with the figure above, the normal phase is CPOL(Clock Polarity)＝0 based on the clock, the inverted phase is CPOL＝1, the first edge of the sampling reference is CPHA (Clock Phase)＝0, and the second edge is CPHA＝1. can see. It is recommended to check the waveform and mode number as each manufacturer may differ from the expression method in the table.

 

4. SPI communication data frame

 

In SPI communication, there is virtually no fixed data frame. Because the amount of data bits is not determined as the active state and the inactive state are divided by the level of SS#, and the data frame transmitted and received from the falling edge of the signal to the rising edge. As shown in the figure, only the clock(SPI Mode 0) in the active state is regarded as data, and nothing else is recognized. Depending on the connected device, it may be ‘0’ or ‘1’ in the idle state, but all will be ignored.
  The figure shows that MSB(Most Significant Bit) is transmitted for 8 bits, but if necessary, it can be changed to LSB(Least Significant Bit) first. In addition, a larger amount of transmission is possible depending on the length of SS#, and it is also possible to process one frame that is usually from 8 bits to more than 100 bits as long.
  For reference, when comparing 100 communication with 8 bits and communication with 800 bits once, it takes longer to repeat frame-by-frame transmission even if the amount of data is the same. This is because, whenever a transmission is transmitted, the delay due to the transition and the time in the idle state are also accumulated. Therefore, it is advantageous to send as much as possible at once, but in some cases, it is difficult for the receiver to process too much data, so the size of the data frame should be decided in consideration of the communication cycle and the surrounding environment. The following is an example of 16-bit continuous transmission.

 

5. DSPI, QSPI communication

 

Like the structure in which the slave responds after the master makes a request during SPI communication, there is a hardware that has been changed to enable transmission and reception of both lines on the premise that transmission and reception do not occur at the same time. This is called DSPI(Dual Serial Peripheral Interface: Dual SPI), and it doubles both transmission and reception speed with two half-duplex circuits. If MOSI becomes IO0 and takes care of even bits, and MISO becomes IO1 and takes charge of odd bits, it is possible to transmit 1 byte at the 4th clock.

 

 

Add IO2 and IO3 to DSPI again, IO0 takes over bits 0 and 4, IO1 takes bits 1 and 5, IO2 handles bits 2 and 6, and IO3 takes over bits 3 and 7 for transmission and reception. In this way, there is also QSPI (Quad Serial Peripheral Interface: Quadruple SPI) where one byte transfer ends at the second clock. These communications are often seen in high-speed memory circuits that require fast reads and writes.

 

6. Conclusion

When you need fast serial communication such as RAM-type memory, multi-channel ADC/DAC, or color LCD, consider SPI communication.

Communication

1. About communication

Communication is when two or more objects are connected to transmit or receive information. There are many types of communication methods depending on the distance to opponent or the environment. Before knowing the communication itself, it is necessary to understand the criteria for communication selection. Let's take a look at some of the characteristics below.

 

2. Communication characteristics – Serial and parallel

p class=MsoNormal style='margin-bottom:0cm;text-indent:10.0pt;line-height: normal'>If there are 8 data, the simplest way to finish communication is to make 8 lines between the transmitter(TX) and the receiver(RX) and send them all at the same time. Parallel communication that sends multiple data at once will end very quickly, but other problems that arise are not simple. The number of data changes for each content to be communicated, so it is impossible to send one data per line every time, and there are limits to the cost and space to create a line.
  If so, let's reduce the number of lines to a minimum to reduce the cost and transmit all 8 data on one line. In the case of this serial communication, it will take a long time to communicate, but even if there is more data, it is solved by transmitting all of it on the same line. However, since the receiver cannot distinguish between data and the next data on one line, the transmission speed is promised in advance or a reference clock is transmitted together so that it can be identified.
  For reference, communication speed is expressed in baud rate or bit rate. Baud rate refers to the number of modulations per second or the number of clocks(＝frequency). In generic digital communication, the baud rate and the bit rate are the same and are often used interchangeably. Here, bit rate is the number of bits per second, and bps(Bit Per Second, lowercase) is used as a unit. And, in the case of a clock, it is good to understand the internal structure if you think of it as a square wave with a constant frequency and duty ratio as used in the memory structure.

 

 

The above relative characteristics are summarized as follows.

 

Comm. Type	Parallel	Serial
Number of lines	Many	Few
Trans. speed	Fast	Slow
Effective distance	Short	Long
Production cost	Increase	Reduction

 

As such, in the case of parallel communication, the available places are limited, so communication generally referred to means serial communication in this blog.

 

3. Communication characteristics – Synchronous and asynchronous

In communication, when a transmitter transmits data, it is called synchronous communication by putting a clock and sending it together like a register. The receiver only needs to interpret the data in response to this clock, it can be recognized quickly and thus the communication speed is also improved. However, there is a problem in that the clock is not data sent from the transmitter and only takes up the line, increasing the production cost. In addition, the clock to be transmitted has to be continuously managed in one side, and it is radiated in the form of an electromagnetic field having the frequency of the clock and affects the surroundings. The higher the frequency of the clock, the worse it is.
  Therefore, the clock line is removed and the transmitter and the receiver communicate by promising the transmission speed in advance. This is called asynchronous communication. The overall communication speed is limited because the receiver must recognize the change several times faster than the promised speed. However, unless a very high speed is required due to a large amount of data, the clock line is eliminated, thereby reducing the cost and enabling communication in an environment in which one of the sources of communication errors is removed.

 

 

4. Communication characteristics – Full-duplex and half-duplex

Assuming that the transmitter and receiver are combined into one structure, transmission and reception are possible at the same time as in a telephone because a transmission line and a reception line are made separately, which is called full-duplex communication. There is no interruption in communication due to transmission during reception, so data flow is smooth and quick response is possible.
  However, if there is no need for a quick response, one line is in a state of being unused alternately, which can also be regarded as an unnecessary line. Thus, half-duplex communication means that the lines of the transmitter and the receiver are merged into one so that reception is impossible during transmission and transmission is not possible during reception, like a walkie-talkie. In this communication, transmission and reception are not performed at the same time, it may be necessary to manage the transmission time point and the expected reception time point separately.

 

 

5. Communication characteristics – Single-ended signal and differential signal

When transmitting information in communication, sometimes the transmitted and received contents do not match. If there is no problem in the line itself, it is possible to suspect information inconsistency due to the electromagnetic field outside the line. The source of this problem is often called noise.
  When transmitting in communication, the existing method of using one line to transmit data in one direction is called a single-ended signal, the solution to the noise of this line is to apply a high voltage to make the response to the noise insensitive. However, as the communication speed increases, the voltage is lowered than before and the signal slope is adjusted more steeply, and the influence of external noise becomes severe.
  Therefore, it is recognized as a method of comparing the potential difference between the two signals by changing to a pair of lines composed of a noninverted signal and an inverted signal. Since only the difference between the two lines is recognized, the same applied noise does not affect the difference between the two lines. By adding a line in this way, the effect of noise can be ignored, and this method is called a differential signal. Although this method significantly improves the effect on noise and contributes to the speed improvement of overall communication, there is also a manufacturing difficulty in that a pair of lines must be of the same length and must always be closely attached or twisted so that the effect of noise is equal. In addition, as the number of lines increases, the cost also generally increases.

 

 

6. Conclusion

In addition to these, communication characteristics include data structure, distance limitation, threshold voltage, and multiple communication, just be aware and get a detailed look at the communication when you see it.